- 您现在的位置：买卖IC网 > Sheet目录369 > W9725G6KB-25I (Winbond Electronics)IC DDR2 SDRAM 256MBIT 84WBGA
W9725G6KB
1. GENERAL DESCRIPTION
The W9725G6KB is a 256M bits DDR2 SDRAM, organized as 4,194,304 words ? 4 banks ? 16 bits.
This device achieves high speed transfer rates up to 1066Mb/sec/pin (DDR2-1066) for general
applications. W9725G6KB is sorted into the following speed grades: -18, -25, 25I, 25A, 25K and -3.
The -18 grade parts is compliant to the DDR2-1066 (7-7-7) specification. The -25/25I/25A/25K grade
parts are compliant to the DDR2-800 (5-5-5) or DDR2-800 (6-6-6) specification (the 25I industrial
grade parts which is guaranteed to support -40°C ≤ T CASE ≤ 95°C). The -3 grade parts is compliant to
the DDR2-667 (5-5-5) specification.
The automotive grade parts temperature, if offered, has two simultaneous requirements: ambient
temperature (T A ) surrounding the device cannot be less than -40°C or greater than +95°C (for 25A),
+105°C (for 25K), and the case temperature (T CASE ) cannot be less than -40°C or greater than +95°C
(for 25A), +105°C (for 25K). JEDEC specifications require the refresh rate to double when T CASE
exceeds +85°C; this also requires use of the high-temperature self refresh option. Additionally, ODT
resistance and the input/output impedance must be derated when T CASE is < 0°C or > +85°C.
All of the control and address inputs are synchronized with a pair of externally supplied differential
clocks. Inputs are latched at the cross point of differential clocks (CLK rising and CLK falling). All
I/Os are synchronized with a single ended DQS or differential DQS- DQS pair in a source
synchronous fashion.
2. FEATURES
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
Power Supply: V DD , V DDQ = 1.8 V ? 0.1V
Double Data Rate architecture: two data transfers per clock cycle
CAS Latency: 3, 4, 5, 6 and 7
Burst Length: 4 and 8
Bi-directional, differential data strobes (DQS and DQS ) are transmitted / received with data
Edge-aligned with Read data and center-aligned with Write data
DLL aligns DQ and DQS transitions with clock
Differential clock inputs (CLK and CLK )
Data masks (DM) for write data
Commands entered on each positive CLK edge, data and data mask are referenced to both edges
of DQS
Posted CAS programmable additive latency supported to make command and data bus efficiency
Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal
quality
Auto-precharge operation for read and write bursts
Auto Refresh and Self Refresh modes
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = Read Latency - 1 (WL = RL - 1)
Interface: SSTL_18
Packaged in WBGA 84 Ball (8X12.5 mm 2 ), using Lead free materials with RoHS compliant
Publication Release Date: Sep. 03, 2012
-4-
Revision A03
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
W972GG6JB-3I
IC DDR2 SDRAM 2GBITS 84WBGA
W9751G6IB-25
IC DDR2-800 SDRAM 512MB 84-WBGA
W9751G6KB-25
IC DDR2 SDRAM 512MBIT 84WBGA
W9812G6JH-6I
IC SDRAM 128MBIT 54TSOPII
W9816G6IH-6I
IC SDRAM 16MBIT 50TSOPII
W9825G6JH-6I
IC SDRAM 256MBIT 54TSOPII
W9864G6JH-6I
IC SDRAM 64MBIT 54TSOPII
WM-5614
CABINET WALL MOUNT 37.25X17.9"
相关代理商/技术参数
W9725G6KB25I TR
制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X16, IND TEMP
W9725G6KB25K
制造商:WINBOND 制造商全称:Winbond 功能描述:DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
W9725G6KB-3
制造商:WINBOND 制造商全称:Winbond 功能描述:DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
W9725G8JB
制造商:WINBOND 制造商全称:Winbond 功能描述:8M ? 4 BANKS ? 8 BIT DDR2 SDRAM
W9725G8JB25
制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 32Mx8 1.8V 60-Pin WBGA
W9725G8JB25I
制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 32Mx8 1.8V 60-Pin WBGA
W9725G8JB25ITR
制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X8, IND TEMP
W9725G8JB25TR
制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X8